1. Field of the Invention
The present description relates to apparatuses and methods for modulation of base-band signals into signals operating at given frequencies, in particular radio-frequency.
2. Description of the Related Art
The tendency of the market of microelectronic devices of presenting increasingly high levels of performance at extremely contained costs, as well as the concentration of an increasingly higher number of functions in portable devices, intensifies the demand for devices that involve a low power consumption. Said requirements are met via the use of high-efficiency CMOS technological processes with sub-micrometric channel lengths, which, however, on account of certain technological constraints, require very low supply voltages. All of these elements have in general a marked impact on the design of analog circuits, and frequently impose the use of non-conventional structures.
One of the circuit blocks that is most affected by the new constraints of supply voltage is the transmission mixer (or modulator), which performs the function of converting to radio-frequency (RF) the low-frequency signal coming from the base-band (BB) circuit, with a conversion gain generally not lower than 0 dB. In addition, since the most modern modulation systems (CDMA, WLAN, etc.), characterized by encodings that generate instantaneously input signals of high amplitude, the use is necessary of circuit topologies with high input dynamic ranges.
In what follows, known architectures for transmission modulators will be described, evaluating, for each of them, the minimum supply voltage that can be used, the corresponding power consumption, and the levels of performance.
FIG. 1 represents a circuit diagram of a modulator apparatus, designated as a whole by the reference number 10, representing the topology most widely used for the transmission modulator.
As can be also appreciated in what follows, the modulator apparatus 10 basically comprises two branches corresponding to the two input nodes a and b applied on which is an input-voltage base-band differential signal Vin to be modulated. The modulator apparatus described here and the ones illustrated in what follows present a symmetrical architecture on said branches; hence, elements that are the same associated to each of said branches will be distinguished by the subscripts a and b.
Said modulator apparatus 10 hence comprises a conversion module 20, which, in this case, constitutes autonomously a transconductor stage. Said conversion module 20, as has been mentioned, receives the input-voltage band-base signal Vin on the nodes a and b from an band-base operating apparatus (not shown in FIG. 1). The nodes a and b correspond to the gate electrodes of respective conversion transistors M1a and M1b, of a MOSFET type, equipped with respective degeneration resistances, REEa and REEb, connected between their source electrode and ground. The drain electrodes of said conversion transistors M1a and M1b constitute the current outputs of the transconductor stage 20.
The modulator apparatus 10 represented in FIG. 1 is a modulator of the so-called “stacked” type, in so far as the transconductor stage 20 shares the biasing current with a Gilbert-cell stage 30, also referred to as “Gilbert Quad”. Said Gilbert cell 30 is of the double-balanced type and hence comprises a first pair of transistors MQa and MQb having their source electrode in common, as well as a second pair of transistors MQc and MQd connected in a similar way. A differential control signal VLO, produced by a local oscillator (not represented in FIG. 1 either), is sent at input to the gate electrodes, associated in a common node, of the transistors MQb and MQc. The drain electrodes of the transistors MQa and MQd, according to the known circuit diagram of the balanced Gilbert cell, are connected to the drain electrodes, respectively, of the transistor MQc and of the transistor MQb and are also connected to the supply voltage VDD via respective load resistances RLa and RLb, which convert the current into voltage and across which the output-voltage signal Vout is then taken, whilst the Gilbert cell 30 is connected to the output of the transconductor stage 20 by means of the source electrodes of the first pair of transistors MQa and MQb and of the second pair of transistors MQc and MQd, associated, respectively, to the drain electrode of the conversion transistors M1a and M1b. Functionally the transconductor stage 20 carries out voltage-to-current conversion of the input-voltage signal Vin supplied by the base-band circuit, whilst the Gilbert cell 30, stimulated by the control signal VLO coming from the local oscillator thereof carries out the frequency conversion. The resulting RF current signal is then converted into the output-voltage signal Vout through the output load determined by the load resistances RLa and RLb.
From simple circuit considerations the following approximate expressions are obtained for a minimum supply voltage VDDmin allowed and for a current consumption ISUPPLY of the modulated apparatus 10 of FIG. 1:
                              V                      DD            ⁢            min                          =                              V                          i              ⁢                                                          ⁢              n                                +                      V                          DS              ⁢                                                          ⁢              min                                +                                    V              LO                        2                    +                      V                          DS              ⁢                                                          ⁢              min                                +                                                    V                                  i                  ⁢                                                                          ⁢                  n                                            ·              G              ·              π                        4                    +                                                    V                                  i                  ⁢                                                                          ⁢                  n                                            ·              G                        2                                              (        1        )                                          I          SUPPLY                =                              π            ·                          V                              i                ⁢                                                                  ⁢                n                                      ·            G                                2            ·                          R              L                                                          (        2        )            
Clearly, in Eq. (1) of the input-voltage signal Vin the peak value is used, as likewise of the control signal VLO coming from the local oscillator the amplitude is used. The reference VDSmin designates a minimum value of the drain-to-source voltage at which the MOSFETs operate in the saturation region. The reference G designates the input-output voltage conversion gain of the modulator apparatus 10 (V/V), and RL corresponds to the value of the load resistor RLa,b.
In order to simplify evaluation of the different known topologies of modulators and to compare them with the solution proposed, for each architecture the numeric value of the minimum supply voltage VDDmin and of the current consumption ISUPPLYis calculated assuming the following set of circuit parameters:G=1(0 dB), Vin(peak)=400 mV, RLa,b=100 Ω, VDsmin=200 mV, VLO(peak)=500 mV, VTH=500 mV, VGS=600 mV.  (3)
The above set (3) of circuit parameters is provided purely by way of example and as tool useful for performing a rapid comparison through a reasonable example of application. It does not constitute, hence, a limitation of the field of use of the invention.
By substituting in Eqs. (1) and (2) the values of the set of parameters (3) it is obtained a minimum supply voltage VDDmin of 1.56 V, a minimum current consumption ISUPPLY of 8 mA, and a respective dissipated power of 9.8 mW.
It should be noted how, even though the biasing current is shared between the transconductor stage 20 and the Gilbert cell 30, which operates as mixer, the power consumption is relatively high. In addition, the minimum value of supply voltage VDDmin that guarantees operation of said circuit topology is rather high, and this constitutes an even more limiting factor for modern sub-micrometric technologies.
FIG. 2 shows a modulator apparatus 110 made according to another known architecture, the so-called “folded mixer” architecture. In a way similar to the apparatus 10 of FIG. 1, the modulator apparatus 110 comprises a transconductor stage 120 followed by the Gilbert cell 30. However, the transconductor stage 120 comprises a voltage-to-current conversion module 20 set with the drain electrodes of the transistors M1a and M1b connected to current generators Ia and Ib, which are in turn connected to the supply voltage VDD. In turn, the Gilbert cell 30 has its own load resistor RLa and RLb connected to the ground node. This enables improvement in the voltage dynamic range both of the input signal and of the output signal. The current generators 1a and 1b have the dual function of supplying the biasing current to both of the functional sub-blocks, i.e., the transconductor stage 20 and the Gilbert cell 30, and of maximizing the signal transfer thereof thanks to their intrinsic high output impedance.
The modulator apparatus 110 of FIG. 2 enables very low supply voltages. In fact, the expressions of the minimum supply voltage VDDmin allowed and of the corresponding current consumption ISUPPLY are:
                              V                      DD            ⁢                                                  ⁢            min                          =                              V                          DS              ⁢                                                          ⁢              min                                +                                    V              LO                        2                    +                      V                          DS              ⁢                                                          ⁢              min                                +                                                    V                                  i                  ⁢                                                                          ⁢                  n                                            ·              G              ·              π                        4                    +                                                    V                                  i                  ⁢                                                                          ⁢                  n                                            ·              G                        2                                              (        4        )                                          I          SUPPLY                =                              π            ·                          V                              i                ⁢                                                                  ⁢                n                                      ·            G                                R            L                                              (        5        )            
From a comparison of Eq. (4) with Eq. (1) and of Eq. (5) with Eq. (2) it emerges that, however advantageous the folded-mixer architecture may be in terms of dynamic range, and hence of minimum supply voltage allowed, it presents a current consumption that is double with respect to the architecture represented in FIG. 1.
In fact, if the set of parameters (3) is inserted in Eqs. (4) and (5), it is obtained a minimum supply voltage VDDmin of 1.16 V, but a minimum current consumption ISUPPLY of 12.56 mA, which in practice corresponds to a dissipated power of 14.6 mW. It hence follows that, even though the circuit topology of FIG. 2 is suitable for low-supply-voltage applications, it does not enable a very contained power dissipation, which is a fundamental parameter for portable applications.
FIG. 3 represents a modulator apparatus 210 made according to a so-called “Gm-folded” architecture. A substantially similar modulator apparatus is also known from the document U.S. Pat. No. 5,172,079.
In said circuit configuration a transconductor stage 220 comprises the usual voltage-to-current conversion module 20, comprising the conversion transistors M1a and M1b, in this case PMOS transistors, associated to corresponding degeneration resistor REEa and REEa,b, set connected between their source electrodes and the supply voltage VDD. In addition, the transconductor stage 220 comprises in this case a first current mirror 225, connected to the drain electrode of the conversion transistor M1a and made up of the transistors of M2a′ and M2a″, and a second current mirror 226, connected to the source electrode of the transistor M2a and made up of the transistors M2b′ and M2b″. The current mirrors 225 and 226 mirror the current in the Gilbert cell 30, that is, of the type similar to the one illustrated with reference to FIG. 1. The mirror factor N of the current mirrors 225 and 226, defined as ratio between the aspect ratio of their transistors, is generally identified as a compromise between current consumption and output noise.
The expressions of the minimum supply voltage VDDmin and of the current consumption ISUPPLY for the modulator apparatus 210 according to the Gm-folded topology are:
                              V                      DD            ⁢                                                  ⁢            min                          =                  MAX          ⁢                      {                                                                                                      V                                              DS                        ⁢                                                                                                  ⁢                        min                                                              +                                                                  V                        LO                                            2                                        +                                          V                                              DS                        ⁢                                                                                                  ⁢                        min                                                              +                                                                                            V                                                      i                            ⁢                                                                                                                  ⁢                            n                                                                          ·                        G                        ·                        π                                            4                                        +                                                                                            V                                                      i                            ⁢                                                                                                                  ⁢                            n                                                                          ·                        G                                            2                                                                                                                                                              V                                              i                        ⁢                                                                                                  ⁢                        n                                                              +                                          V                                              DS                        ⁢                                                                                                  ⁢                        min                                                              +                                          V                      GS                                                                                                                              (        6        )                                          I          SUPPLY                =                                            N              +              1                        N                    ·                                    π              ·                              V                                  i                  ⁢                                                                          ⁢                  n                                            ·              G                                      2              ·                              R                L                                                                        (        7        )            
By substituting the set of parameters (3) in the above Eqs. (6) and (7) and setting the mirror ratio N to 5, we obtain a minimum supply voltage VDDmin of 1.2 V and a current consumption ISUPPLY of 7.54 mA, which in practice correspond to a dissipated power of 9 mW. Therefore, in this case, the circuit topology is satisfactory both from the standpoint of the minimum supply voltage allowed (even though it is not the minimum amongst the architectures proposed) and from the standpoint of the associated power dissipation. On the other hand, however, it presents a series of disadvantages that reduce the aforesaid advantages in the actual definition of the circuit. In fact, since the mirrors used in the transconductor are “simple”, i.e., not in “cascode” configuration, on account of the phenomenon of channel modulation, the transfer of signal, as likewise the replica of the biasing current, are markedly dependent upon the differences in the drain-to-source voltages between the transistors M2a′ and M2a″, as well as M2b′ and M2b″. In addition, on account of the rectification of the signal coming from the local oscillator on the source electrodes of the transistors of the Gilbert cell, the differences between said drain-to-source voltages of the transistors M2a′-M2a″ and M2b′-M2b″ are also a function both of the biasing voltage of the Gilbert cell 20 and of the amplitude of the control signal VLO of the local oscillator. Said elements unfavorably affect the transfer of signal and determine a lack of accuracy of the conversion gain of the modulator apparatus; this represents in general a limit for completely integrated circuit applications. Furthermore, even though the effect of channel modulation can be mitigated by the use of long-channel MOS devices, since the constraints on the input and output dynamic ranges (low overdrive→high shape ratio W/L) impose the use of high shape factors, this results in large parasitic capacitances at the drains of the transistors M2a″ and M2b″, with consequent high feed-through of the local oscillator.